Reusable Analog IP – Make Your IP Intelligent with Intelligent IP
Unternehmen
Reusable Analog IP – Make Your IP Intelligent with Intelligent IP
15.02.2022 – 15.02.2023 | 16:00 - 17:00 Uhr | Region online
Designing analog/mixed-signal ICs is a major challenge for ASIC development.
Designing analog/mixed-signal ICs is a major challenge for ASIC development with tight specifications and tapeout schedules that are not easy to meet. Therefore, we are continuously working on concepts and automated design tools that help designers with both design efficiency and risk management. In this webinar we will give you an insight into some of these solutions and how you can benefit from